1. Field of the Invention
The present invention relates to an apparatus and a method for etching an insulating film and, more particularly, to an apparatus and a method for etching an insulating film formed on a thin film transistor array substrate of a liquid crystal display panel.
2. Discussion of the Related Art
Generally, liquid crystal display (LCD) devices include a LCD panel having a plurality of liquid crystal cells (e.g., unit pixels) arranged in a matrix pattern and a driver integrated circuit (IC) for driving the plurality of liquid crystal cells. Upon driving, the driver IC applies data signals to predetermined ones of the liquid crystal cells, wherein the data signals control light transmittance characteristics of respective ones of the liquid crystal cells to thereby display images.
LCD panels typically include a color filter substrate, a thin film transistor (TFT) array substrate opposing the color filter substrate, and a layer of liquid crystal material formed between the two substrates. The TFT array substrate supports a plurality of gate lines capable of transmitting scan signals supplied from a gate driver IC to the liquid crystal cells and a plurality of data lines capable of transmitting data signals supplied from a data driver IC to the liquid crystal cells. The plurality of data lines are substantially perpendicular to the plurality of gate lines, TFTs are formed at crossings of the gate and data lines, and the liquid crystal cells are defined by the crossings of the gate and data lines.
The gate driver IC sequentially supplies the scan signals to the plurality of gate lines such that the liquid crystal cells are sequentially selected one horizontal line at a time. The data driver IC individually supplies the data signals to selected ones of the liquid crystal cells.
A plurality of pixel electrodes and a common electrode are formed on inner side surfaces of the TFT array substrate and the color filter substrate, respectively, and applying electric fields to the liquid crystal layer. The plurality of pixel electrodes are formed within respective ones of the liquid crystal cells on the TFT array substrate while the common electrode is formed over the entire surface of the color filter substrate. Light transmittance characteristics of individual liquid crystal cells is selectively controlled by controlling the voltage applied to predetermined ones of the pixel electrodes while applying a voltage to the common electrode. To control the voltage applied to predetermined ones of the pixel electrodes, TFTs are used as switching devices connected to corresponding ones of the gate lines, data lines, and pixel electrodes to selectively apply voltages to pixel electrodes.
FIG. 1 illustrates a liquid crystal cell of a related art LCD device.
Referring to FIG. 1, a plurality of gate lines 4-1 and 4 extend along a first direction on a substrate and are separated from each other by a predetermined distance and a plurality of data lines 2 and 2+1 extend along a second direction, substantially perpendicular to the first direction, and are separated from each other on by a predetermined distance. Accordingly, crossings of the plurality of gate lines 4-1 and 4 and data lines 2 and 2+1 generate a regular matrix pattern, wherein liquid crystal cells are defined by the crossings of the gate and data lines 2 and 4, respectively, and wherein TFTs are provided at crossings of the gate and data lines 2 and 4, respectively, and are connected to pixel electrodes 14.
Each TFT includes a gate electrode 10 protruding from a portion of the gate line 4, a source electrode 8 protruding from a portion of the data line 2 and overlapping with the gate electrode 10, and a drain electrode 12 spaced apart from the source electrode 8 by a predetermined distance. The drain electrode 12 is formed with the source electrode electrically connected to a corresponding pixel electrode 14 through a drain contact hole 16. The pixel electrode 14 is generally formed of conductive materials having high light transmittance characteristics such as indium tin oxide (ITO). The TFT is further provided with a semiconductor layer (not shown) that provides a conductive channel between the source electrode 8 and the drain electrode 12 when a scan signal supplied to the gate electrode 10 via the gate line 4. When a scan signal is supplied to the gate electrode 10, the conductive channel transmits a data signal, supplied to the source electrode 8 via the data line 4, to the drain electrode 12 wherein the drain electrode 12 applies the data signal to the pixel electrode 14 via through the drain contact hole 16. Applied to the pixel electrode 14, and together with a common electrode formed on a color filter substrate (not shown), the data signal generates an electric field within a liquid crystal layer having a dielectric anisotropy. Upon generation of the electric field, liquid crystal molecules within the liquid crystal layer rotate to transmit light. The degree to which light is transmitted by the liquid crystal cell is controlled by a voltage value of the data signal applied to the pixel electrode 14.
Further, a gate insulating film (not shown) is formed over the gate lines 4 and 4-1 and the pixel electrode 14 and is connected to a storage electrode 20 through a storage contact hole 22. The storage electrode 20 overlaps with the preceding gate line 4-1 and separated from the preceding gate line 4-1 by the gate insulating film and thus functions as a storage capacitor 18 that sustains the driving of the liquid crystal cell by supplying a charged voltage during a period when the TFT turned off, after a voltage value of a scan signal is charged to the gate line 4 during a period when the TFT is turned on when the scan signal is applied.
FIG. 2 illustrates a cross-sectional view of the liquid crystal cell shown in FIG. 1, taken along section line I-I′.
Referring to FIG. 2, the liquid crystal cell includes a color filter substrate 60 attached to and facing the TFT array substrate 50, a spacer 70 for uniformly maintaining a distance between the TFT array substrate 50 and the color filter substrate 60, and a liquid crystal layer 80 formed within the space between the TFT array substrate 50 and the color filter substrate 60.
The process of fabricating the TFT will now be described in greater detail with reference to FIG. 2.
The gate electrode 10 and gate line 4 (not shown) are formed by providing a metal layer (e.g., Mo, Al, or Cr) on the TFT array substrate 50 and patterning the metal layer. Insulating material is then deposited over the entire surface of the TFT array substrate 50 and the gate electrode 10 to form a gate insulating film 30. A semiconductor layer 32 (e.g., amorphous silicon) and an ohmic contact layer 34 doped with a high concentration of phosphorus (P) (e.g., n+ amorphous silicon) are sequentially deposited and patterned to form an active layer 36. The source electrode 8 and the drain electrode 12 are then formed by depositing a metal layer on the gate insulating film 30 and the ohmic contact layer 34 and patterning the deposited metal layer such that the source electrode 8 is spaced apart from the drain electrode 12 by a predetermined distance over the active layer 36. Upon patterning to form the source and drain electrodes 8 and 12, a portion of the ohmic contact layer 34 becomes exposed and, subsequently, the exposed portion of the ohmic contact layer 34 is removed. As the ohmic contact layer 34 is removed, a portion of the semiconductor layer 32 becomes exposed. The exposed portion of the semiconductor layer 32 is the channel region of the TFT.
A passivation film 38 is then formed by depositing insulating material over the entire surface of the gate insulating film 30, the source electrode 8, the drain electrode 12, and the channel region of the TFT. A drain contact hole 16 for exposing a portion of the drain electrode 12 is then formed by selectively etching the passivation film 38 over the drain electrode 12. A pixel electrode 14 is then formed by depositing and patterning a transparent metal material on the passivation film 38 and electrically contacts the drain electrode 12 through the drain contact hole 16.
An alignment layer 51 is then formed over the entire surface of the TFT array substrate 50 including the passivation film 38 and the pixel electrode 14. After forming the alignment layer 51 a rubbing process is performed wherein the rubbing process provides an initial alignment direction to the subsequently provided liquid crystal layer. The rubbing process generates a plurality of parallel grooves on the surface of the alignment layer 51 that are capable of determining an orientation of a polymer chain within the liquid crystal layer. The rubbing process is performed by applying a rubbing a cloth to the surface of the alignment layer 51 at a uniform pressure and speed.
The process of fabricating the storage capacitor region will now be described in greater detail with reference to FIG. 2.
Simultaneously with the formation of the gate electrode 10 and gate line 4 described above, a gate line 4-1 is formed over the TFT array substrate 50 followed by the formation of the gate insulating film 30. Simultaneously with the formation of the source and drain electrodes 8 and 12, a storage electrode 20 is then patterned over the gate insulating film 30, wherein the storage electrode 20, separated from the gate line 4-1 by the gate insulating film 30 and overlapping the gate line 4-1, functions as a storage capacitor 18.
After forming the passivation film 38, a storage contact hole 22 is formed simultaneously with the formation of the drain contact hole 16 by etching a portion of the passivation film 38 to expose a portion of the storage electrode 20. Upon patterning of the aforementioned pixel electrode 14, a portion of the pixel electrode 14 becomes electrically connected to the storage electrode 20 through the storage contact hole 22.
The process of fabricating the color filter substrate 60 will now be described in greater detail with reference to FIG. 2.
A black matrix layer 62 is deposited over the entire surface of the color filter substrate 60 to form openings spaced apart from each other at a predetermined interval. Next, color filters 63 corresponding to red (R), green (G), and blue (B) colors are formed within the openings defined by the black matrix layer 62. A common electrode 64 is then formed over the entire surface of the color filter 63 and the black matrix layer 62 by depositing and patterning a metal layer.
An alignment layer 65 is then formed over the entire surface of the color filter substrate 60 including common electrode 64 and a rubbing process, similar to the rubbing process described above, is performed.
After the TFT array substrate 50 and color filter substrate 60 are fabricated, sealant material (not shown) is printed onto the TFT array substrate 50 (or color filter substrate 60) and spacers 70 are formed on the color filter substrate 60 (or TFT array substrate 50). The spacers 70 are formed according to a scattering method wherein glass beads, plastic beads, etc., having a predetermined diameter are uniformly scattered over the surface of the substrate. After the sealant material is printed and the spacers 70 are formed on the TFT array and color filter substrates, the two substrates are attached to each other and cut into unit LCD panels. Upon cutting the attached substrates, the device yield of the aforementioned fabrication process is improved and the a plurality of LCD panels are simultaneously formed from attached substrates having a large area.
As described above, the related art LCD device is fabricated by separately preparing TFT array substrates 50 and color filter substrates 60 in parallel processes, attaching the TFT array and color filter substrates 50 and 60 to each other, and cutting the TFT array and color filter substrates 50 and 60 into unit LCD panels. Further, the distance between the attached TFT array and color filter substrates 50 and 60 must be kept substantially uniform via the spacers 70. Still further, in forming individual devices such as the thin film transistor TFT and the storage capacitor 18 on the thin film transistor array substrate 50, an insulating film is deposited, contact holes are patterned within the insulating film via selective etching processes, and a metal layer is deposited and patterned within the contact holes.
A related art apparatus for etching the aforementioned insulating film will now be described in greater detail with reference to FIGS. 3 and 4.
FIG. 3 illustrates a side view of a related art etching apparatus.
Referring to FIG. 3, the related art etching apparatus for etching the insulating film includes a supporting bar 102 for supporting a substrate 101 (e.g., a glass substrate) having an insulating film formed thereon, rotatable rollers 103A-103D formed on the supporting bar 102 for moving the substrate 101 along a lateral direction, and a spray nozzle 105 for spraying etchant (HF) through nozzle holes 104A-104C onto the upper surface of the substrate 101 moving along the lateral direction.
FIG. 4 illustrates a top view of the related art etching apparatus shown in FIG. 3.
Referring to FIG. 4, the related art apparatus for etching the insulating film includes supporting bars 102A-102C, for supporting the substrate 101 having the insulating film formed thereon, provided at center and side surfaces of the substrate 101, rotatable rollers 103A-103D formed at first side surfaces of each of the supporting bars 102A-102C for moving the substrate 101 along the lateral direction.
When the substrate 101, having the insulating film formed thereon, is loaded onto the related art etching apparatus shown in FIGS. 3 and 4, the supporting bars 102A-102C support the substrate 101 while the rotatable rollers 103A-103D move the substrate 101 along the lateral direction. Further, etchant is sprayed through the nozzle holes 104A-104C of the spray nozzle 105 onto the surface of the insulating film, thereby etching the insulating film formed on the upper surface of the substrate 101.
Upon etching the insulating film using the related art etching apparatus, however, the etching byproducts become attached to the lower surface of the substrate 101 wherein the etching byproducts deleteriously generate spots. Further, the etchant disadvantageously etches the lower surface of the substrate 101. Still further, the substrate 101, supported by the supporting bars 102A-102C becomes unbalanced between the first side and a second side, opposing the first side, of the supporting bars 102A-102C since the rotatable rollers 103A-103D are positioned only at first sides of the supporting bars 102A-102C. Accordingly, portions of the substrate 101 droop between the supporting bars 102A-102C wherein the etchant collects on the drooping portions of the substrate 101, causing non-uniform etching of the substrate 101.
Further, since the rotatable rollers 103A-103D are positioned only at the first sides of the supporting bars 102A-102C, contact surfaces of the substrate 101 (i.e., portions of the surface of the substrate 101 contacting the rotatable rollers 103A-103D) become excessively large, thereby generating spots (e.g., roller marks) on the substrate 101.
In view of the above, the related art etching apparatus and method for etching the insulating film are disadvantageous due to a degradation of picture quality of the LCD device upon generation of spots on the substrate.